RailMind RailMind

ICNCE 2026 · Aachen · 28 June — 2 July

Non-Gradient Neural Dynamics for
Real-Time Edge Intelligence

Inference engine without surrogate gradients

Poster presented · Tuesday 30 June 2026 · Eurogress Aachen

0.9ms

inference latency

STM32 F767ZI · Cortex-M7 · 216 MHz

~130mW

active power (est.)

198KB

fixed runtime

Zero malloc · deterministic latency

Hardware

Tested across six platforms — STM32 F7 / H7 family, ESP32, Raspberry Pi 5. The single-domain F7 architecture wins on tail latency despite lower clock frequency. Full multi-board benchmark in the poster.

STM32 Nucleo-F767ZI board running the RailMind cognitive engine live on the bench
STM32 Nucleo-F767ZI · Cortex-M7 @ 216 MHz — the engine running on-device on the bench. Full six-platform benchmark (STM32 F7/H7, ESP32, Raspberry Pi 5) on the poster.

In one paragraph

Edge AI today either trains offline and ships a frozen model, or runs surrogate-gradient SNNs that still depend on backpropagation through time. We explore an orthogonal regime: a software inference engine designed for real-time operation on constrained hardware — no end-to-end backpropagation, on-device adaptation by construction. In the L-tier configuration (not the full configuration), the engine runs at a mean engine-step latency of 0.90 ms on an STM32F767 (Cortex-M7, 216 MHz). The architecture is spike-mappable. Algorithmic equivalence and state preservation for the spiking path have been validated in software. Hardware deployment on Pulsar and Loihi 2 is on the roadmap. The currently shipping implementation is the equivalent fixed-point implementation. It has been evaluated on standard PdM / SHM benchmarks using within-operating-condition protocols; we position the engine on form factor and online operation, not on out-detecting classical scorers. Cross-device generalisation remains an active research question.

Note: figures reflect the STM32F767 MCU deployment. An earlier abstract's 50 KB figure referred to frozen model weights only — it does not represent the full edge build, the deployment package, or shipping firmware size.

Presented at ICNCE 2026

We presented this poster at ICNCE 2026 in Aachen (28 June — 2 July 2026). For collaboration discussions — particularly with neuromorphic-hardware groups about substrate-agnostic deployment — get in touch any time.

Contact: j.lou@railmind.eu

Project: RailMind — cognitive architecture research programme

RailMind Systems · Neuss, Germany